Datasheet

46.7.31 USART Manchester Configuration Register
Name: US_MAN
Offset: 0x0050
Reset: 0xB30011004
Property: Read/Write
This register can only be written if the WPEN bit is cleared in the USAR
T Write Protection Mode Register.
Bit 31 30 29 28 27 26 25 24
RXIDLEV DRIFT ONE RX_MPOL RX_PP[1:0]
Access
Reset 0 0 1 1 0 0
Bit 23 22 21 20 19 18 17 16
RX_PL[3:0]
Access
Reset 0 0 0 1
Bit 15 14 13 12 11 10 9 8
TX_MPOL TX_PP[1:0]
Access
Reset 1 0 0
Bit 7 6 5 4 3 2 1 0
TX_PL[3:0]
Access
Reset 0 1 0 0
Bit 31 – RXIDLEV Receiver Idle V
alue
Value Description
0
Receiver line idle value is 0.
1
Receiver line idle value is 1.
Bit 30 – DRIFT Drift Compensation
Value Description
0
The USART cannot recover from an important clock drift
1
The USART can recover from clock drift. The 16X clock mode must be enabled.
Bit 29 – ONE Must Be Set to 1
Bit 29 must always be set to 1 when programming the US_MAN register
.
Bit 28 – RX_MPOL Receiver Manchester Polarity
Value Description
0
Logic zero is coded as a zero-to-one transition, Logic one is coded as a one-to-zero transition.
1
Logic zero is coded as a one-to-zero transition, Logic one is coded as a zero-to-one transition.
Bits 25:24 – RX_PP[1:0] Receiver Preamble Pattern detected
The following values assume that RX_MPOL field is not set:
Value Name Description
00
ALL_ONE The preamble is composed of ‘1’s
01
ALL_ZERO The preamble is composed of ‘0’s
10
ZERO_ONE The preamble is composed of ‘01’s
11
ONE_ZERO The preamble is composed of ‘10’s
Bits 19:16 – RX_PL[3:0] Receiver Preamble Length
SAM E70/S70/V70/V71 Family
Universal Synchronous Asynchronous Receiver T
ransc...
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2019 Microchip Technology Inc.
Datasheet
DS60001527D-page 1282