Datasheet

Bit 5 – OVRE Overrun Error (cleared by writing a one to bit US_CR.RSTST
A)
Value Description
0
No overrun error has occurred since the last RSTSTA.
1
At least one overrun error has occurred since the last RSTSTA.
Bit 1 – TXRDY T
ransmitter Ready (cleared by writing US_THR)
Value Description
0
A character is in the US_THR waiting to be transferred to the Transmit Shift Register or the transmitter
is disabled. As soon as the transmitter is enabled, TXRDY becomes 1.
1
There is no character in the US_THR.
Bit 0 – RXRDY Receiver Ready (cleared by reading US_THR)
Value Description
0
No complete character has been received since the last read of US_RHR or the receiver is disabled. If
characters were being received when the receiver was disabled, RXRDY changes to 1 when the
receiver is enabled.
1
At least one complete character has been received and US_RHR has not yet been read.
SAM E70/S70/V70/V71 Family
Universal Synchronous Asynchronous Receiver T
ransc...
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1269