Datasheet

46.7.18 USART Channel Status Register (SPI_MODE)
Name: US_CSR (SPI_MODE)
Offset: 0x0014
Reset: 0x0
Property: Read-only
This configuration is relevant only if USART_MODE = 0xE or 0xF in the USAR
T Mode Register.
Bit 31 30 29 28 27 26 25 24
Access
Reset
Bit 23 22 21 20 19 18 17 16
NSS NSSE
Access
Reset 0 0
Bit 15 14 13 12 11 10 9 8
UNRE TXEMPTY
Access
Reset 0 0
Bit 7 6 5 4 3 2 1 0
OVRE TXRDY RXRDY
Access
Reset 0 0 0
Bit 23 – NSS Image of NSS Line
Value Description
0
NSS line is driven low (if NSSE = 1, falling edge occurred on NSS line).
1
NSS line is driven high (if NSSE = 1, rising edge occurred on NSS line).
Bit 19 – NSSE NSS Line (Driving CTS Pin) Rising or Falling Edge Event (cleared on read)
Value Description
0
No NSS line event has been detected since the last read of US_CSR.
1
A rising or falling edge event has been detected on NSS line since the last read of US_CSR.
Bit 10 – UNRE Underrun Error (cleared by writing a one to bit US_CR.RSTST
A)
Value Description
0
No SPI underrun error has occurred since the last RSTSTA.
1
At least one SPI underrun error has occurred since the last RSTSTA.
Bit 9 – TXEMPTY T
ransmitter Empty (cleared by writing US_THR)
Value Description
0
There are characters in either US_THR or the Transmit Shift Register, or the transmitter is disabled.
1
There are no characters in US_THR, nor in the Transmit Shift Register.
Bit 5 – OVRE Overrun Error (cleared by writing a one to bit US_CR.RSTST
A)
Value Description
0
No overrun error has occurred since the last RSTSTA.
1
At least one overrun error has occurred since the last RSTSTA.
Bit 1 – TXRDY T
ransmitter Ready (cleared by writing US_THR)
SAM E70/S70/V70/V71 Family
Universal Synchronous Asynchronous Receiver T
ransc...
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echnology Inc.
Datasheet
DS60001527D-page 1265