Datasheet

Figure 46-45. Master Node Configuration, NACT = PUBLISH
Frame
Break
Synch
Protected
Identifier
Data 1
Data N
Checksum
TXRDY
Write
US_THR
Write
US_LINIR
Data 1 Data 2 Data 3
Data N-1
Data N
RXRDY
Header
Inter-
frame
space
Response
space
Frame slot = t
Frame_Maximum
Response
Data3
LINTC
FSDIS=1
FSDIS=0
Figure 46-46. Master Node Configuration, NACT = SUBSCRIBE
Break
Synch
Protected
Identifier
Data 1
Data N
Checksum
TXRDY
Read
US_RHR
Write
US_LINIR
Data 1
Data N-1
Data N-1
RXRDY
Data NData N-2
Header
Inter-
frame
space
Response
space
Frame
Frame slot = t
Frame_Maximum
Response
Data3
LINTC
FSDIS=0
FSDIS=1
Figure 46-47. Master Node Configuration, NACT = IGNORE
TXRDY
Write
US_LINIR
RXRDY
LINTC
Break
Synch
Protected
Identifier
Data 1
Data N
Checksum
Data N-1
Header
Inter-
frame
space
Response
space
Frame
Frame slot = t
Frame_Maximum
Response
Data3
FSDIS=1
FSDIS=0
46.6.9.15.2 Slave Node Configuration
• Write TXEN and RXEN in US_CR to enable both the transmitter and the receiver.
•
Write USART_MODE in US_MR to select the LIN mode and the slave node configuration.
• Write CD and FP in US_BRGR to configure the baud rate.
• Wait until LINID in US_CSR rises.
• Check LINISFE and LINPE errors.
• Read IDCHR in US_RHR.
SAM E70/S70/V70/V71 Family
Universal Synchronous Asynchronous Receiver T
ransc...
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1215