Datasheet

Once the Synch Field has been entirely received, the clock divider (LINCD) and the fractional part (LINFP) are
updated in the LIN Baud Rate register (US_LINBRR) with the computed values, if the Synchronization is not disabled
by the SYNCDIS bit in the LIN Mode register (US_LINMR).
After reception of the Synch Field:
•
If it appears that the computed baud rate deviation compared to the initial baud rate is superior to the maximum
tolerance FTol_Unsynch (±15%), then the clock divider (LINCD) and the fractional part (LINFP) are not updated,
and the error flag US_CSR.LINSTE is set to ‘1’.
• If it appears that the sampled Synch character is not equal to 0x55, then the clock divider (LINCD) and the
fractional part (LINFP) are not updated, and the error flag US_CSR.LINISFE is set to ‘1’.
Flags LINSTE and LINISFE are reset by writing US_CR.RSTSTA to ‘1’.
Figure 46-42. Slave Node Synchronization
RXD
Baud Rate
Clock
LINIDRX
Synchro Counter
000_0011_0001_0110_1101
US_BRGR
Clock Divider (CD)
US_BRGR
Fractional Part (FP)
Initial CD
Initial FP
Reset
US_LINBRR
Clock Divider (CD)
0000_0110_0010_1101
US_LINBRR
Fractional Part (FP)
101
Initial CD
Initial FP
Start
Bit
1
0 1 0 1 0 1 0
Stop
Bit
Start
Bit
ID0 ID1 ID2 ID3 ID4 ID5 ID6 ID7Break Field
13 dominant bits (at 0)
Stop
Bit
Break
Delimiter
1 recessive bit
(at 1)
Synch Byte = 0x55
The accuracy of the synchronization depends on several parameters:
•
Nominal clock frequency (f
Nom
) (the theoretical slave node clock frequency)
• Baud Rate
• Oversampling (OVER = 0 => 16X or OVER = 1 => 8X)
The following formula is used to compute the deviation of the slave bit rate relative to the master bit rate after
synchronization (f
SLAVE
is the real slave node clock frequency):
Baudratedeviation =
100 ×
 ×
8 ×
2  OVER +  × Baudrate
8
× f
SLAVE
%
Baudratedeviation = 100 ×
 × 8 × 2  OVER +  × Baudrate
8 ×
f
TOL_UNSYNCH
100
× f
Nom
%
0.5 
  +0.5‐1 <  < +1
f
T
OL_UNSYNCH
is the deviation of the real slave node clock from the nominal clock frequency. The LIN Standard
imposes that it must not exceed ±15%. The LIN Standard imposes also that for communication between two nodes,
their bit rate must not differ by more than ±2%. This means that the baud rate deviation must not exceed ±1%.
It follows from that, a minimum value for the nominal clock frequency:
f
Nom
min = 100 ×
0.5 × 8 × 2  OVER + 1 × Baudrate
8
×
15
100
+
1
× 1%
Hz
Examples:
•
Baud rate = 20 kbit/s, OVER = 0 (Oversampling 16X) => f
Nom
(min) = 2.64 MHz
SAM E70/S70/V70/V71 Family
Universal Synchronous Asynchronous Receiver T
ransc...
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1210