Datasheet

Figure 46-34. IrDA Demodulator Operations
MCK
RXD
Receiver
Input
Pulse
rejected
6 5 4 3 2
6
1
6 5 4 3 2 0
Pulse
accepted
Counter
Value
The programmed value in the US_IF register must always meet the following criterion:
t
peripheral clock
× (IRDA_FIL
TER + 3) < 1.41 μs
As the IrDA mode uses the same logic as the ISO7816, note that the FI_DI_RATIO field in US_FIDI must be set to a
value higher than 0 in order to ensure IrDA communications operate correctly.
46.6.6 RS485 Mode
The USART features the RS485 mode to enable line driver control. While operating in RS485 mode, the USART
behaves as though in Asynchronous or Synchronous mode and configuration of all the parameters is possible. The
difference is that the RTS pin is driven high when the transmitter is operating. The behavior of the RTS pin is
controlled by the TXEMPTY bit. A typical connection of the USART to an RS485 bus is shown in Figure 46-35.
Figure 46-35. Typical Connection to a RS485 Bus
USART
RTS
TXD
RXD
Differential
Bus
RS485 mode is enabled by writing the value 0x1 to the US_MR.USART_MODE.
The R
TS pin is at a level inverse to the TXEMPTY bit. Significantly, the RTS pin remains high when a timeguard is
programmed so that the line can remain driven after the last character completion. Figure 46-36 gives an example of
the RTS waveform during a character transmission when the timeguard is enabled.
Figure 46-36. Example of RTS Drive with Timeguard
D0 D1 D2 D3 D4 D5 D6 D7
TXD
Start
Bit
Parity
Bit
Stop
Bit
Baud Rate
Clock
TG = 4
Write
US_THR
TXRDY
TXEMPTY
RTS
1
SAM E70/S70/V70/V71 Family
Universal Synchronous Asynchronous Receiver T
ransc...
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1203