Datasheet

Figure 45-3. I2SC Clock Generation
I2SC_MCK
I2SC_CK
I2SC_WS
i2sws_in
i2sck_in
Peripheral
Clock
0
1
0
1
0
1
I2SC_CR.CKEN/CKDIS
I2SC_MR.IMCKDIV
I2SC_MR.IMCKMODE
I2SC_CR.CKEN/CKDIS
I2SC_MR.IMCKFS
I2SC_MR.DATALENGTH
I2SC_MR.DATALENGTH
I2SC_MR.MODE
Slave
Master
Slave
i2sck_in
i2sws_in
I2SC_MR.IMCKMODE
Internal
bit clock
Internal
word clock
Clock
Enable
Clock
Divider
Clock
Divider
Clock
Divider
Clock
Enable
0
1
MATRIX.CCFG_PCCR.I2SCxCC
I2SC
Selected Clock
GCLK[PID]
45.6.6 Mono
When the Transmit Mono bit (TXMONO) in I2SC_MR is set, data written to the left channel is duplicated to the right
output channel.
When the Receive Mono bit (RXMONO) in I2SC_MR is set, data received from the left channel is duplicated to the
right channel.
45.6.7 Holding Registers
The I2SC user interface includes a Receive Holding Register (I2SC_RHR) and a Transmit Holding Register
(I2SC_THR). These registers are used to access audio samples for both audio channels.
When a new data word is available in I2SC_RHR, the Receive Ready bit (RXRDY) in I2SC_SR is set. Reading
I2SC_RHR clears this bit.
A receive overrun condition occurs if a new data word becomes available before the previous data word has been
read from I2SC_RHR. In this case, the Receive Overrun bit in I2SC_SR and bit i of the RXORCH field in I2SC_SR
are set, where i is the current receive channel number.
When I2SC_THR is empty, the Transmit Ready bit (TXRDY) in I2SC_SR is set. Writing to I2SC_THR clears this bit.
A transmit underrun condition occurs if a new data word needs to be transmitted before it has been written to
I2SC_THR. In this case, the Transmit Underrun (TXUR) bit and bit i of the TXORCH field in I2SC_SR are set, where i
is the current transmit channel number. If the TXSAME bit in I2SC_MR is ’0’, then a zero data word is transmitted in
case of underrun. If I2SC_MR.TXSAME is ’1’, then the previous data word for the current transmit channel number is
transmitted.
Data words are right-justified in I2SC_RHR and I2SC_THR. For the 16-bit compact stereo data format, the left
sample uses bits 15:0 and the right sample uses bits 31:16 of the same data word. For the 8-bit compact stereo data
format, the left sample uses bits 7:0 and the right sample uses bits 15:8 of the same data word.
SAM E70/S70/V70/V71 Family
Inter-IC Sound Controller (I2SC)
©
2019 Microchip Technology Inc.
Datasheet
DS60001527D-page 1159