Datasheet

Value Description
1
A compare 0 has occurred since the last read of the Status Register.
Bit 5 – OVRUN Receive Overrun
Value Description
0
No data has been loaded in SSC_RHR while previous data has not been read since the last read of the
Status Register
.
1
Data has been loaded in SSC_RHR while previous data has not yet been read since the last read of
the Status Register.
Bit 4 – RXRDY Receive Ready
Value Description
0
SSC_RHR is empty.
1
Data has been received and loaded in SSC_RHR.
Bit 1 – TXEMPTY T
ransmit Empty
Value Description
0
Data remains in SSC_THR or is currently transmitted from TSR.
1
Last data written in SSC_THR has been loaded in TSR and last data loaded in TSR has been
transmitted.
Bit 0 – TXRDY T
ransmit Ready
Value Description
0
Data has been loaded in SSC_THR and is waiting to be loaded in the transmit shift register (TSR).
1
SSC_THR is empty.
SAM E70/S70/V70/V71 Family
Synchronous Serial Controller (SSC)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1145