Datasheet

Figure 44-3. Audio Application Block Diagram
SSC
RK
RF
RD
TD
TF
TK
Clock SCK
Word Select WS
Data SD
I2S
RECEIVER
Clock SCK
Word Select WS
Data SD
Right Channel
Left Channel
MSB MSB
LSB
Figure 44-4. Codec Application Block Diagram
SSC
RK
RF
RD
TD
TF
TK
Serial Data Clock (SCLK)
Frame Sync (FSYNC)
Serial Data Out
Serial Data In
CODEC
Serial Data Clock (SCLK)
Frame Sync (FSYNC)
Serial Data Out
Serial Data In
First Time Slot
Dstart
Dend
SAM E70/S70/V70/V71 Family
Synchronous Serial Controller (SSC)
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echnology Inc.
Datasheet
DS60001527D-page 1114