Datasheet

43.7.16 TWIHS Write Protection Status Register
Name: TWIHS_WPSR
Offset: 0xE8
Reset: 0x00000000
Property: Read-only
Bit 31 30 29 28 27 26 25 24
WPVSRC[23:16]
Access
R R R R R R R R
Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16
WPVSRC[15:8]
Access
R R R R R R R R
Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8
WPVSRC[7:0]
Access
R R R R R R R R
Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
WPVS
Access
R
Reset 0
Bits 31:8 – WPVSRC[23:0] W
rite Protection Violation Source
When WPVS = 1, WPVSRC indicates the register address offset at which a write access has been attempted.
Bit 0 – WPVS Write Protection Violation Status
Value Description
0
No write protection violation has occurred since the last read of the TWIHS_WPSR.
1
A write protection violation has occurred since the last read of the TWIHS_WPSR. If this violation is an
unauthorized attempt to write a protected register
, the associated violation is reported into field
WPVSRC.
SAM E70/S70/V70/V71 Family
T
wo-wire Interface (TWIHS)
© 2019 Microchip T
echnology Inc.
Datasheet
DS60001527D-page 1111