Datasheet

Value Name Description

LASTXFER The chip select is deasserted when the bit LASTXFER is written to ‘1’ and the

character written in QSPI_TDR.TD has been transferred.

SYSTEMATICALLY The chip select is deasserted systematically after each transfer.

Bit 2 – WDRBT W

ait Data Read Before Transfer

0 (DISABLED): No effect. In SPI mode, a transfer can be initiated whatever the state of the QSPI_RDR is.

1 (ENABLED): In SPI mode, a transfer can start only if the QSPI_RDR is empty, i.e., does not contain any unread

data. This mode prevents overrun error in reception.

Bit 1 – LLB Local Loopback Enable

0 (DISABLED): Local loopback path disabled.

1 (ENABLED): Local loopback path enabled.

LLB controls the local loopback on the data serializer for testing in SPI mode only. (MISO is internally connected on

MOSI).

Bit 0 – SMM Serial Memory Mode

0 (SPI): The QSPI is in SPI mode.

1 (MEMORY): The QSPI is in Serial Memory mode.

SAM E70/S70/V70/V71 Family

Quad Serial Peripheral Interface (QSPI)

echnology Inc.

Datasheet

DS60001527D-page 1027