Datasheet

XOSC (crystal oscillator) stopped
XOSC32K (32 kHz crystal oscillator) running with external 32kHz crystal
OSC8M at 8MHz
Clocks
OSC8M used as main clock source
CPU, AHB and APBn clocks undivided
The following AHB module clocks are running: NVMCTRL, HPB2 bridge, HPB1 bridge, HPB0
bridge
All other AHB clocks stopped
The following peripheral clocks running: PM, SYSCTRL
All other peripheral clocks stopped
I/Os are inactive with internal pull-up
CPU in IDLE0 mode
Cache enabled
BOD33 disabled
In this default conditions, the power consumption I
default
is measured.
Operating mode for each peripheral in turn:
Configure and enable the peripheral GCLK (When relevant, see conditions)
Unmask the peripheral clock
Enable the peripheral (when relevant)
Set CPU in IDLE0 mode
Measurement I
periph
Wake-up CPU via EIC (async: level detection, filtering disabled)
Disable the peripheral (when relevant)
Mask the peripheral clock
Disable the peripheral GCLK (when relevant, see conditions)
Each peripheral power consumption provided in table x.y is the value (I
periph
- I
default
), using the same
measurement method as for global power consumption measurement
Table 37-12. Typical Peripheral Current Consumption
Peripheral Conditions Typ. Units
RTC f
GCLK_RTC
= 32kHz, 32bit counter mode 7.4 μA
WDT f
GCLK_WDT
=32kHz, normal mode with EW 5.5 μA
ACx Both f
GCLK
=8MHz, Enable both COMP 31.3 μA
TCC2 f
GCLK
=8MHz, Enable + COUNTER 95.5 μA
TCC1 f
GCLK
=8MHz, Enable + COUNTER 167.5 μA
TCC0 f
GCLK
=8MHz, Enable + COUNTER 180.3 μA
SERCOMx.I2CM
(2)
f
GCLK
=8MHz, Enable 69.7 μA
SERCOMx.I2CS f
GCLK
=8MHz, Enable 29.2 μA
SERCOMx.SPI f
GCLK
=8MHz, Enable 64.6 μA
SAM D21 Family
Electrical Characteristics
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 993