Datasheet

configured in a way that requires it to be periodically serviced by the CPU through interrupts or similar,
improper operation or data loss may result during debugging.
35.5.8 Register Access Protection
All registers with write-access can be write-protected optionally by the Peripheral Access Controller
(PAC), except the following registers:
Interrupt Flag Status and Clear (INTFLAG) register
Data Buffer (DATABUF) register
Optional write-protection by the Peripheral Access Controller (PAC) is denoted by the "PAC Write-
Protection" property in each individual register description.
PAC write-protection does not apply to accesses through an external debugger
Related Links
11.6 PAC - Peripheral Access Controller
35.5.9 Analog Connections
The DAC has one output pin (VOUT) and one analog input pin (VREFA) that must be configured first.
When internal input is used, it must be enabled before DAC Controller is enabled.
35.6 Functional Description
35.6.1 Principle of Operation
The DAC converts the digital value located in the Data register (DATA) into an analog voltage on the DAC
output (VOUT).
A conversion is started when new data is written to the Data register. The resulting voltage is available on
the DAC output after the conversion time. A conversion can also be started by input events from the
Event System.
35.6.2 Basic Operation
35.6.2.1 Initialization
The following registers are enable-protected, meaning they can only be written when the DAC is disabled
(CTRLA.ENABLE is zero):
Control B register (CTRLB)
Event Control register (EVCTRL)
Enable-protection is denoted by the Enable-Protected property in the register description.
Before enabling the DAC, it must be configured by selecting the voltage reference using the Reference
Selection bits in the Control B register (CTRLB.REFSEL).
35.6.2.2 Enabling, Disabling and Resetting
The DAC Controller is enabled by writing a '1' to the Enable bit in the Control A register
(CTRLA.ENABLE). The DAC Controller is disabled by writing a '0' to CTRLA.ENABLE.
The DAC Controller is reset by writing a '1' to the Software Reset bit in the Control A register
(CTRLA.SWRST). All registers in the DAC will be reset to their initial state, and the DAC Controller will be
disabled. Refer to the CTRLA register for details.
SAM D21 Family
DAC – Digital-to-Analog Converter
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 962