Datasheet

Value Name Description
0x5
VSCALE VDD scaler
0x6
BANDGAP Internal bandgap voltage
0x7
DAC DAC output
Bits 6:5 – INTSEL[1:0] Interrupt Selection
These bits select the condition for comparator n to generate an interrupt or event. COMPCTRLn.INTSEL
can be written only while COMPCTRLn.ENABLE is zero.
These bits are not synchronized.
Value Name Description
0x0
TOGGLE Interrupt on comparator output toggle
0x1
RISING Interrupt on comparator output rising
0x2
FALLING Interrupt on comparator output falling
0x3
EOC Interrupt on end of comparison (single-shot mode only)
Bits 3:2 – SPEED[1:0] Speed Selection
This bit indicates the speed/propagation delay mode of comparator n. COMPCTRLn.SPEED can be
written only while COMPCTRLn.ENABLE is zero.
These bits are not synchronized.
Value Name Description
0x0
LOW Low speed
0x1
HIGH High speed
0x2-0x3
N/A Reserved
Bit 1 – SINGLE Single-Shot Mode
This bit determines the operation of comparator n. COMPCTRLn.SINGLE can be written only while
COMPCTRLn.ENABLE is zero.
These bits are not synchronized.
Value Description
0
Comparator n operates in continuous measurement mode.
1
Comparator n operates in single-shot mode.
Bit 0 – ENABLE Enable
Writing a zero to this bit disables comparator n.
Writing a one to this bit enables comparator n. After writing to this bit, the value read back will not change
until the action initiated by the writing is complete.
Due to synchronization, there is a latency of at least two GCLK_AC_DIG clock cycles from updating the
register until the comparator is enabled/disabled. The bit will continue to read the previous state while the
change is in progress. Writing a one to COMPCTRLn.ENABLE will prevent further changes to the other
bits in COMPCTRLn. These bits remain protected until COMPCTRLn.ENABLE is written to zero and the
write is synchronized.
SAM D21 Family
AC – Analog Comparators
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 958