Datasheet
comparator. Filtering is selectable from none, 3-bit majority (N=3) or 5-bit majority (N=5) functions. Any
change in the comparator output is considered valid only if N/2+1 out of the last N samples agree. The
filter sampling rate is the GCLK_AC frequency.
Note that filtering creates an additional delay of N-1 sampling cycles from when a comparison is started
until the comparator output is validated. For continuous mode, the first valid output will occur when the
required number of filter samples is taken. Subsequent outputs will be generated every cycle based on
the current sample plus the previous N-1 samples, as shown in Figure 34-7. For single-shot mode, the
comparison completes after the Nth filter sample, as shown in Figure 34-8.
Figure 34-7. Continuous Mode Filtering
Sampling Clock
Sampled
Comparator Output
3-bit Majority
Filter Output
5-bit Majority
Filter Output
Figure 34-8. Single-Shot Filtering
Sampling Clock
3-bit Sampled
Comparator Output
3-bit Majority
Filter Output
Start
5-bit Sampled
Comparator Output
5-bit Majority
Filter Output
t
STARTUP
During sleep modes, filtering is supported only for single-shot measurements. Filtering must be disabled if
continuous measurements will be done during sleep modes, or the resulting interrupt/event may be
generated incorrectly.
34.6.10 Comparator Output
The output of each comparator can be routed to an I/O pin by setting the Output bit group in the
Comparator Control x register (COMPCTRLx.OUT). This allows the comparator to be used by external
circuitry. Either the raw, non-synchronized output of the comparator or the CLK_AC-synchronized version,
including filtering, can be used as the I/O signal source. The output appears on the corresponding CMP[x]
pin.
34.6.11 Offset Compensation
The Swap bit in the Comparator Control registers (COMPCTRLx.SWAP) controls switching of the input
signals to a comparator's positive and negative terminals. When the comparator terminals are swapped,
the output signal from the comparator is also inverted, as shown in Figure 34-9. This allows the user to
measure or compensate for the comparator input offset voltage. As part of the input selection,
COMPCTRLx.SWAP can be changed only while the comparator is disabled.
SAM D21 Family
AC – Analog Comparators
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 939