Datasheet
33.8.4 Sampling Time Control
Name: SAMPCTRL
Offset: 0x03
Reset: 0x00
Property: Write-Protected
Bit 7 6 5 4 3 2 1 0
SAMPLEN[5:0]
Access
R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0
Bits 5:0 – SAMPLEN[5:0] Sampling Time Length
These bits control the ADC sampling time in number of half CLK_ADC cycles, depending of the prescaler
value, thus controlling the ADC input impedance. Sampling time is set according to the equation:
Samplingtime = SAMPLEN+1
CLK
ADC
2
SAM D21 Family
ADC – Analog-to-Digital Converter
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 909