Datasheet

33.8.2 Reference Control
Name: REFCTRL
Offset: 0x01
Reset: 0x00
Property: Write-Protected
Bit 7 6 5 4 3 2 1 0
REFCOMP REFSEL[3:0]
Access
R/W R/W R/W R/W R/W
Reset 0 0 0 0 0
Bit 7 – REFCOMP Reference Buffer Offset Compensation Enable
The accuracy of the gain stage can be increased by enabling the reference buffer offset compensation.
This will decrease the input impedance and thus increase the start-up time of the reference.
Value Description
0
Reference buffer offset compensation is disabled.
1
Reference buffer offset compensation is enabled.
Bits 3:0 – REFSEL[3:0] Reference Selection
These bits select the reference for the ADC.
Table 33-5. Reference Selection
REFSEL[3:0] Name Description
0x0 INT1V 1.0V voltage reference
0x1 INTVCC0 1/1.48 VDDANA
0x2 INTVCC1 1/2 VDDANA (only for VDDANA > 2.0V)
0x3 VREFA External reference
0x4 VREFB External reference
0x5-0xF Reserved
SAM D21 Family
ADC – Analog-to-Digital Converter
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 907