Datasheet

...........continued

Offset Name Bit Pos.

0x28 CALIB

7:0 LINEARITY_CAL[7:0]

15:8 BIAS_CAL[2:0]

0x2A DBGCTRL 7:0 DBGRUN

33.8 Register Description

Registers can be 8, 16 or 32 bits wide. Atomic 8-, 16- and 32-bit accesses are supported. In addition, the

8-bit quarters and 16-bit halves of a 32-bit register and the 8-bit halves of a 16-bit register can be

accessed directly.

Some registers are optionally write-protected by the Peripheral Access Controller (PAC). Write-protection

is denoted by the Write-Protected property in each individual register description.

Some registers require synchronization when read and/or written. Synchronization is denoted by the

Write-Synchronized or the Read-Synchronized property in each individual register description.

Some registers are enable-protected, meaning they can be written only when the ADC is disabled.

Enable-protection is denoted by the Enable-Protected property in each individual register description.

SAM D21 Family

ADC – Analog-to-Digital Converter

Datasheet Complete

DS40001882D-page 905