Datasheet

Table 33-3. Averaging
Number of
Accumulated
Samples
AVGCTRL.
SAMPLENUM
Intermediate
Result
Precision
Number of
Automatic
Right Shifts
Division
Factor
AVGCTRL.ADJRES Total
Number
of Right
Shifts
Final Result
Precision
Automatic
Division
Factor
1 0x0 12 bits 0 1 0x0 12 bits 0
2 0x1 13 0 2 0x1 1 12 bits 0
4 0x2 14 0 4 0x2 2 12 bits 0
8 0x3 15 0 8 0x3 3 12 bits 0
16 0x4 16 0 16 0x4 4 12 bits 0
32 0x5 17 1 16 0x4 5 12 bits 2
64 0x6 18 2 16 0x4 6 12 bits 4
128 0x7 19 3 16 0x4 7 12 bits 8
256 0x8 20 4 16 0x4 8 12 bits 16
512 0x9 21 5 16 0x4 9 12 bits 32
1024 0xA 22 6 16 0x4 10 12 bits 64
Reserved 0xB-0xF 0x0 12 bits 0
33.6.8 Oversampling and Decimation
By using oversampling and decimation, the ADC resolution can be increased from 12 bits up to 16 bits,
for the cost of reduced effective sampling rate.
To increase the resolution by n bits, 4
n
samples must be accumulated. The result must then be right-
shifted by n bits. This right-shift is a combination of the automatic right-shift and the value written to
AVGCTRL.ADJRES. To obtain the correct resolution, the ADJRES must be configured as described in the
table below. This method will result in n bit extra LSB resolution.
Table 33-4. Configuration Required for Oversampling and Decimation
Result
Resolution
Number of
Samples to
Average
AVGCTRL.SAMPLENUM[3:0] Number of
Automatic
Right Shifts
AVGCTRL.ADJRES[2:0]
13 bits 4
1
= 4 0x2 0 0x1
14 bits 4
2
= 16 0x4 0 0x2
15 bits 4
3
= 64 0x6 2 0x1
16 bits 4
4
= 256 0x8 4 0x0
33.6.9 Window Monitor
The window monitor feature allows the conversion result in the RESULT register to be compared to
predefined threshold values. The window mode is selected by setting the Window Monitor Mode bits in
the Window Monitor Control register (WINCTRL.WINMODE[2:0]). Threshold values must be written in the
Window Monitor Lower Threshold register (WINLT) and Window Monitor Upper Threshold register
(WINUT).
If differential input is selected, the WINLT and WINUT are evaluated as signed values. Otherwise they are
evaluated as unsigned values. The significant WINLT and WINUT bits are given by the precision selected
in the Conversion Result Resolution bit group in the Control B register (CTRLB.RESSEL). This means
SAM D21 Family
ADC – Analog-to-Digital Converter
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 900