Datasheet

Bit 0 – TRCPT Transfer Complete x interrupt Enable
Writing a zero to this bit has no effect.
Writing a one to this bit will enable the Transfer Complete interrupt Enable bit x.
0.2.7 Host Registers - Pipe RAM
Value Description
0
The Transfer Complete x interrupt is disabled.
1
The Transfer Complete x interrupt is enabled.
SAM D21 Family
USB – Universal Serial Bus
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Datasheet Complete
DS40001882D-page 881