Datasheet

32.8.6.5 Pipe Status Register n
Name: PSTATUS
Offset: 0x106 + (n x 0x20)
Reset: 0x00
Property: PAC Write-Protection
Bit 7 6 5 4 3 2 1 0
BK1RDY BK0RDY PFREEZE CURBK DTGL
Access
R R R R R
Reset 0 0 0 0 0
Bit 7 – BK1RDY Bank 1 is ready
Writing a one to the bit EPSTATUSCLR.BK1RDY will clear this bit.
Writing a one to the bit EPSTATUSSET.BK1RDY will set this bit.
This bank is not used for Control pipe.
Value Description
0
The bank number 1 is not ready: For IN the bank is empty. For Control/OUT the bank is not
yet fill in.
1
The bank number 1 is ready: For IN the bank is filled full. For Control/OUT the bank is filled
in.
Bit 6 – BK0RDY Bank 0 is ready
Writing a one to the bit EPSTATUSCLR.BK0RDY will clear this bit.
Writing a one to the bit EPSTATUSSET.BK0RDY will set this bit.
This bank is the only one used for Control pipe.
Value Description
0
The bank number 0 is not ready: For IN the bank is not empty. For Control/OUT the bank is
not yet fill in.
1
The bank number 0 is ready: For IN the bank is filled full. For Control/OUT the bank is filled
in.
Bit 4 – PFREEZE Pipe Freeze
Writing a one to the bit EPSTATUSCLR.PFREEZE will clear this bit.
Writing a one to the bit EPSTATUSSET.PFREEZE will set this bit.
This bit is also set by the hardware:
• When a STALL handshake has been received.
• After a PIPE has been enabled (rising of bit PEN.N).
• When an LPM transaction has completed whatever handshake is returned or the transaction was
timed-out.
• When a pipe transfer was completed with a pipe error. See 32.8.6.6 PINTFLAG register.
SAM D21 Family
USB – Universal Serial Bus
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 874