Datasheet

13.13.1 Control
Name:  CTRL
Offset:  0x0000
Reset:  0x00
Property:  PAC Write-Protection
Bit 7 6 5 4 3 2 1 0
CE MBIST CRC SWRST
Access
W W W W
Reset 0 0 0 0
Bit 4 – CE Chip-Erase
Writing a '0' to this bit has no effect.
Writing a '1' to this bit starts the Chip-Erase operation.
Bit 3 – MBIST Memory Built-In Self-Test
Writing a '0' to this bit has no effect.
Writing a '1' to this bit starts the memory BIST algorithm.
Bit 2 – CRC 32-bit Cyclic Redundancy Check
Writing a '0' to this bit has no effect.
Writing a '1' to this bit starts the cyclic redundancy check algorithm.
Bit 0 – SWRST Software Reset
Writing a '0' to this bit has no effect.
Writing a '1' to this bit resets the module.
SAM D21 Family
DSU - Device Service Unit
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 87