Datasheet

Writing a one to this bit will clear the Transfer Complete x interrupt Enable bit and disable the
corresponding interrupt request.
Value Description
0
The Transfer Complete bank x interrupt is disabled.
1
The Transfer Complete bank x interrupt is enabled and an interrupt request will be generated
when the Transfer Complete x Interrupt Flag is set.
SAM D21 Family
USB – Universal Serial Bus
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Datasheet Complete
DS40001882D-page 848