Datasheet

32.8.3.1 Device Endpoint Configuration register n
Name: EPCFGn
Offset: 0x100 + (n x 0x20)
Reset: 0x00
Property: PAC Write-Protection
Bit 7 6 5 4 3 2 1 0
EPTYPE1[2:0] EPTYPE0[2:0]
Access
R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0
Bits 6:4 – EPTYPE1[2:0] Endpoint Type for IN direction
These bits contains the endpoint type for IN direction.
Upon receiving a USB reset EPCFGn.EPTYPE1 is cleared except for endpoint 0 which is unchanged.
Value Description
0x0
Bank1 is disabled.
0x1
Bank1 is enabled and configured as Control IN.
0x2
Bank1 is enabled and configured as Isochronous IN.
0x3
Bank1 is enabled and configured as Bulk IN.
0x4
Bank1 is enabled and configured as Interrupt IN.
0x5
Bank1 is enabled and configured as Dual-Bank OUT
(Endpoint type is the same as the one defined in EPTYPE0)
0x6-0x7
Reserved
Bits 2:0 – EPTYPE0[2:0] Endpoint Type for OUT direction
These bits contains the endpoint type for OUT direction.
Upon receiving a USB reset EPCFGn.EPTYPE0 is cleared except for endpoint 0 which is unchanged.
Value Description
0x0
Bank0 is disabled.
0x1
Bank0 is enabled and configured as Control SETUP / Control OUT.
0x2
Bank0 is enabled and configured as Isochronous OUT.
0x3
Bank0 is enabled and configured as Bulk OUT.
0x4
Bank0 is enabled and configured as Interrupt OUT.
0x5
Bank0 is enabled and configured as Dual Bank IN
(Endpoint type is the same as the one defined in EPTYPE1)
0x6-0x7
Reserved
SAM D21 Family
USB – Universal Serial Bus
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 840