Datasheet

32.8.1.3 QOS Control

Name: QOSCTRL

Offset: 0x03

Reset: 0x05

Property: PAC Write-Protection

Bit 7 6 5 4 3 2 1 0

DQOS[1:0] CQOS[1:0]

Access

R/W R/W R/W R/W

Reset 0 1 0 1

Bits 3:2 – DQOS[1:0] Data Quality of Service

These bits define the memory priority access during the endpoint or pipe read/write data operation. Refer

to SRAM Quality of Service.

Bits 1:0 – CQOS[1:0] Configuration Quality of Service

These bits define the memory priority access during the endpoint or pipe read/write configuration

operation. Refer to SRAM Quality of Service.