Datasheet

32.8.1.1 Control A
Name: CTRLA
Offset: 0x00
Reset: 0x00
Property: PAC Write-Protection, Write-Synchronised
Bit 7 6 5 4 3 2 1 0
MODE RUNSTDBY ENABLE SWRST
Access
R/W R/W R/W R/W
Reset 0 0 0 0
Bit 7 – MODE Operating Mode
This bit defines the operating mode of the USB.
Value Description
0
USB Device mode
1
USB Host mode
Bit 2 – RUNSTDBY Run in Standby Mode
This bit is Enable-Protected.
Value Description
0
USB clock is stopped in standby mode.
1
USB clock is running in standby mode
Bit 1 – ENABLE Enable
Due to synchronization there is delay from writing CTRLA.ENABLE until the peripheral is enabled/
disabled. The value written to CTRLA.ENABLE will read back immediately and the Synchronization status
enable bit in the Synchronization Busy register (SYNCBUSY.ENABLE) will be set. SYNCBUSY.ENABLE
will be cleared when the operation is complete.
This bit is Write-Synchronized.
Value Description
0
The peripheral is disabled or being disabled.
1
The peripheral is enabled or being enabled.
Bit 0 – SWRST Software Reset
Writing a zero to this bit has no effect.
Writing a '1' to this bit resets all registers in the USB, to their initial state, and the USB will be disabled.
Writing a '1' to CTRLA.SWRST will always take precedence, meaning that all other writes in the same
write-operation will be discarded.
Due to synchronization there is a delay from writing CTRLA.SWRST until the reset is complete.
CTRLA.SWRST and SYNCBUSY.SWRST will both be cleared when the reset is complete.
This bit is Write-Synchronized.
SAM D21 Family
USB – Universal Serial Bus
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 819