Datasheet

– No pipe size limitations
– Supports multiplexed virtual pipe on one physical pipe to allow an unlimited USB tree
– Built-in DMA with multi-packet support and dual bank for all pipes
– Supports feedback endpoint
– Supports the USB 2.0 Phase-locked SOFs feature
32.3 USB Block Diagram
Figure 32-1. LS/FS Implementation: USB Block Diagram
USB 2.0
Core
USB
APB
NVIC
GCLK
USB interrupts
GCLK_USB
System clock domain USB clock domain
DM
DP
SOF 1kHz
SRAM Controller
AHB Slave AHB Master
User
Interface
dedicated bus
device-wide bus
32.4 Signal Description
Pin Name Pin Description Type
DM Data -: Differential Data Line - Port Input/Output
DP Data +: Differential Data Line + Port Input/Output
SOF 1kHZ SOF Output Output
Refer to I/O Multiplexing and Considerations for details on the pin mapping for this peripheral. One signal
can be mapped on several pins.
Related Links
7. I/O Multiplexing and Considerations
32.5 Product Dependencies
In order to use this peripheral module, other parts of the system must be configured correctly, as
described below.
SAM D21 Family
USB – Universal Serial Bus
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 792