Datasheet

• Internally from the CPU, without any limitation, even when the device is protected

• Externally from a debug adapter, with some restrictions when the device is protected

For security reasons, DSU features have limitations when used from a debug adapter. To differentiate

external accesses from internal ones, the first 0x100 bytes of the DSU register map has been mirrored at

offset 0x100:

• The first 0x100 bytes form the internal address range

• The next 0x100 bytes form the external address range

When the device is protected, the DAP can only issue MEM-AP accesses in the DSU range

0x0100-0x2000.

The DSU operating registers are located in the 0x0000-0x00FF area and remapped in 0x0100-0x01FF to

differentiate accesses coming from a debugger and the CPU. If the device is protected and an access is

issued in the region 0x0100-0x01FF, it is subject to security restrictions. For more information, refer to the

Table 13-1.

Figure 13-4. APB Memory Mapping

0x0000

0x00FF

0x0100

0x01FF

0x1000

0x1FFF

DSU operating

registers

Mirrored

DSU operating

registers

DSU CoreSight

ROM

Empty

Internal address range

(cannot be accessed from debug tools when the device is

protected by the NVMCTRL security bit)

External address range

(can be accessed from debug tools with some restrictions)

Some features not activated by APB transactions are not available when the device is protected:

Table 13-1. Feature Availability Under Protection

Features Availability when the device is protected

CPU Reset Extension Yes

Clear CPU Reset Extension No

Debugger Cold-Plugging Yes

Debugger Hot-Plugging No