Datasheet

Value Name Description
Counter Reloaded Prescaler
0x0 GCLK Reload or reset Counter on next
GCLK
-
0x1 PRESC Reload or reset Counter on next
prescaler clock
-
0x2 RESYNC Reload or reset Counter on next
GCLK
Reset prescaler counter
0x3 Reserved
Bit 11 – RUNSTDBY Run in Standby
This bit is used to keep the TCC running in standby mode.
This bit is not synchronized.
Value Description
0
The TCC is halted in standby.
1
The TCC continues to run in standby.
Bits 10:8 – PRESCALER[2:0] Prescaler
These bits select the Counter prescaler factor.
These bits are not synchronized.
Value Name Description
0x0
DIV1 Prescaler: GCLK_TCC
0x1
DIV2 Prescaler: GCLK_TCC/2
0x2
DIV4 Prescaler: GCLK_TCC/4
0x3
DIV8 Prescaler: GCLK_TCC/8
0x4
DIV16 Prescaler: GCLK_TCC/16
0x5
DIV64 Prescaler: GCLK_TCC/64
0x6
DIV256 Prescaler: GCLK_TCC/256
0x7
DIV1024 Prescaler: GCLK_TCC/1024
Bits 6:5 – RESOLUTION[1:0] Dithering Resolution
These bits increase the TCC resolution by enabling the dithering options.
These bits are not synchronized.
Table 31-7. Dithering
Value Name Description
0x0 NONE The dithering is disabled.
0x1 DITH4 Dithering is done every 16 PWM frames.
PER[3:0] and CCx[3:0] contain dithering pattern
selection.
SAM D21 Family
TCC – Timer/Counter for Control Applications
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 746