Datasheet

The following equation calculates the exact resolution for a single-slope PWM (R
PWM_SS
) waveform:

PWM_SS
=
log(TOP+1)
log(2)
The PWM frequency depends on the Period register value (PER) and the peripheral clock frequency
(f
GCLK_TCC
), and can be calculated by the following equation:

PWM_SS
=

GCLK_TCC
N(TOP+1)
Where N represents the prescaler divider used (1, 2, 4, 8, 16, 64, 256, 1024).
31.6.2.5.6 Dual-Slope PWM Generation
For dual-slope PWM generation, the period setting (TOP) is controlled by PER, while CCx control the
duty cycle of the generated waveform output. The figure below shows how the counter repeatedly counts
from ZERO to PER and then from PER to ZERO. The waveform generator output is set on compare
match when up-counting, and cleared on compare match when down-counting. An interrupt and/or event
is generated on TOP (when counting upwards) and/or ZERO (when counting up or down).
In DSBOTH operation, the circular buffer must be enabled to enable the update condition on TOP.
Figure 31-7. Dual-Slope Pulse Width Modulation
COUNT
CCx=ZERO
CCx
CCx=TOP
WO[x]
ZERO
TOP
MAX
"match"
"update"
Using dual-slope PWM results in a lower maximum operation frequency compared to single-slope PWM
generation. The period (TOP) defines the PWM resolution. The minimum resolution is 1 bit
(TOP=0x00000001).
The following equation calculates the exact resolution for dual-slope PWM (R
PWM_DS
):

PWM_DS
=
log(PER+1)
log(2)
.
The PWM frequency f
PWM_DS
depends on the period setting (TOP) and the peripheral clock frequency
f
GCLK_TCC
, and can be calculated by the following equation:

PWM_DS
=

GCLK_TCC
2  PER
N represents the prescaler divider used. The waveform generated will have a maximum frequency of half
of the TCC clock frequency (f
GCLK_TCC
) when TOP is set to 0x00000001 and no prescaling is used.
The pulse width (P
PWM_DS
) depends on the compare channel (CCx) register value and the peripheral
clock frequency (f
GCLK_TCC
), and can be calculated by the following equation:

PWM_DS
=
2  TOP  CCx

GCLK_TCC
SAM D21 Family
TCC – Timer/Counter for Control Applications
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 716