Datasheet

30.8.2 Read Request
Name: READREQ
Offset: 0x02
Reset: 0x0000
Bit 15 14 13 12 11 10 9 8
RREQ RCONT
Access
W R/W
Reset 0 0
Bit 7 6 5 4 3 2 1 0
ADDR[4:0]
Access
R/W R/W R/W R/W R/W
Reset 0 0 0 0 0
Bit 15 – RREQ Read Request
Writing a zero to this bit has no effect.
This bit will always read as zero.
Writing a one to this bit requests synchronization of the register pointed to by the Address bit group
(READREQ. ADDR) and sets the Synchronization Busy bit in the Status register (STATUS.SYNCBUSY).
Bit 14 – RCONT Read Continuously
When continuous synchronization is enabled, the register pointed to by the Address bit group
(READREQ.ADDR) will be synchronized automatically every time the register is updated.
Value Description
0
Continuous synchronization is disabled.
1
Continuous synchronization is enabled.
Bits 4:0 – ADDR[4:0] Address
These bits select the offset of the register that needs read synchronization. In the TC, only COUNT and
CCx are available for read synchronization.
SAM D21 Family
TC – Timer/Counter
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 684