Datasheet

30.8.1 Control A
Name: CTRLA
Offset: 0x00
Reset: 0x00000000
Property: PAC Write-Protection, Write-Synchronized, Enable-Protected
Bit 15 14 13 12 11 10 9 8
PRESCSYNC[1:0] RUNSTDBY PRESCALER[2:0]
Access
R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
WAVEGEN[1:0] MODE[1:0] ENABLE SWRST
Access
R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0
Bits 13:12 – PRESCSYNC[1:0] Prescaler and Counter Synchronization
These bits select whether the counter should wrap around on the next GCLK_TCx clock or the next
prescaled GCLK_TCx clock. It also makes it possible to reset the prescaler.
These bits are not synchronized.
Value Name Description
0x0
GCLK Reload or reset the counter on next generic clock
0x1
PRESC Reload or reset the counter on next prescaler clock
0x2
RESYNC Reload or reset the counter on next generic clock. Reset the prescaler counter
0x3
- Reserved
Bit 11 – RUNSTDBY Run in Standby
This bit is used to keep the TC running in standby mode.
This bit is not synchronized.
Value Description
0
The TC is halted in standby.
1
The TC continues to run in standby.
Bits 10:8 – PRESCALER[2:0] Prescaler
These bits select the counter prescaler factor.
These bits are not synchronized.
Value Name Description
0x0
DIV1 Prescaler: GCLK_TC
0x1
DIV2 Prescaler: GCLK_TC/2
0x2
DIV4 Prescaler: GCLK_TC/4
0x3
DIV8 Prescaler: GCLK_TC/8
0x4
DIV16 Prescaler: GCLK_TC/16
0x5
DIV64 Prescaler: GCLK_TC/64
0x6
DIV256 Prescaler: GCLK_TC/256
SAM D21 Family
TC – Timer/Counter
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 681