Datasheet

Figure 30-9. Input Capture Timing
events
COUNT
TOP
ZERO
Capture 0 Capture 1 Capture 2 Capture 3
The TC can detect capture overflow of the input capture channels: When a new capture event is detected
while the Capture Interrupt flag (INTFLAG.MCx) is still set, the new timestamp will not be stored and
INTFLAG.ERR will be set.
30.6.2.7.2 Period and Pulse-Width (PPW) Capture Action
The TC can perform two input captures and restart the counter on one of the edges. This enables the TC
to measure the pulse width and period and to characterize the frequency f and duty cycle of an input
signal:
 =
1

dutyCycle =



Selecting PWP (pulse-width, period) in the Event Action bit group in the Event Control register
(EVCTRL.EVACT) enables the TC to perform one capture action on the rising edge and the other one on
the falling edge. The period T will be captured into CC1 and the pulse width t
p
in CC0.
EVCTRL.EVACT=PPW (period and pulse-width)offers identical functionality, but will capture T into CC0
and t
p
into CC1.
The TC Event Input Invert Enable bit in the Event Control register (EVCTRL.TCINV) is used to select
whether the wraparound should occur on the rising edge or the falling edge. If EVCTRL.TCINV=1, the
wraparound will happen on the falling edge.
To fully characterize the frequency and duty cycle of the input signal, activate capture on CC0 and CC1
by writing 0x3 to the Capture Channel x Enable bit group in the Control C register (CTRLC.CPTEN).
When only one of these measurements is required, the second channel can be used for other purposes.
The TC can detect capture overflow of the input capture channels: When a new capture event is detected
while the Capture Interrupt flag (INTFLAG.MCx) is still set, the new timestamp will not be stored and
INTFLAG.ERR will be set.
SAM D21 Family
TC – Timer/Counter
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 673