Datasheet

• Match frequency (MFRQ)
• Normal pulse-width modulation (NPWM)
• Match pulse-width modulation (MPWM)
When using NPWM or NFRQ configuration, the TOP will be determined by the counter resolution. In 8-bit
counter mode, the Period register (PER) is used as TOP, and the TOP can be changed by writing to the
PER register. In 16- and 32-bit counter mode, TOP is fixed to the maximum (MAX) value of the counter.
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23. PORT - I/O Pin Controller
30.6.2.6.2 Frequency Operation
Normal Frequency Generation (NFRQ)
For Normal Frequency Generation, the period time (T) is controlled by the period register (PER) for 8-bit
counter mode and MAX for 16- and 32-bit mode. The waveform generation output (WO[x]) is toggled on
each compare match between COUNT and CCx, and the corresponding Match or Capture Channel x
Interrupt Flag (INTFLAG.MCx) will be set.
Figure 30-4. Normal Frequency Operation
COUNT
MAX
TOP
ZERO
CCx
WO[x]
Direction ChangePeriod (T) COUNT Written
"reload" update
"clear" update
"match"
Match Frequency Generation (MFRQ)
For Match Frequency Generation, the period time (T) is controlled by the CC0 register instead of PER or
MAX. WO[0] toggles on each update condition.
Figure 30-5. Match Frequency Operation
COUNT
MAX
CC0
COUNT WrittenDirection Change
Period (T)
ZERO
WO[0]
"reload" update
"clear" update
30.6.2.6.3 PWM Operation
Normal Pulse-Width Modulation Operation (NPWM)
NPWM uses single-slope PWM generation.
SAM D21 Family
TC – Timer/Counter
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 670