Datasheet

29.9.7 Serializer n Control
Name: SERCTRLn
Offset: 0x20 + n*0x04 [n=0..1]
Reset: 0x00000000
Property: Enable-Protected, PAC Write-Protection
Bit 31 30 29 28 27 26 25 24
RXLOOP DMA MONO
Access
R/W R/W R/W
Reset 0 0 0
Bit 23 22 21 20 19 18 17 16
SLOTDISx SLOTDISx SLOTDISx SLOTDISx SLOTDISx SLOTDISx SLOTDISx SLOTDISx
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8
BITREV EXTEND[1:0] WORDADJ DATASIZE[2:0]
Access
R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
SLOTADJ CLKSEL TXSAME TXDEFAULT[1:0] SERMODE[1:0]
Access
R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0
Bit 26 – RXLOOP Loop-back Test Mode
This bit enables a loop-back test mode:
Value Description
0
Each Receiver uses its SDn pin as input (default mode).
1
Receiver uses as input the transmitter output of the other Serializer in the pair: e.g. SD1 for
SD0 or SD0 for SD1.
Bit 25 – DMA Single or Multiple DMA Channels
This bit selects whether even- and odd-numbered slots use separate DMA channels or the same DMA
channel.
DMA Name Description
0x0 SINGLE Single DMA channel
0x1 MULTIPLE One DMA channel per data channel
Bit 24 – MONO Mono Mode.
MONO Name Description
0x0 STEREO Normal mode
SAM D21 Family
I2S - Inter-IC Sound Controller
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 656