Datasheet

In Burst mode, a single Data transfer starts at each Frame Sync pulse; these pulses are 1-bit wide and

occur only when a Data transfer is requested. Note that the compact stereo modes (16C and 8C) are not

supported in the Burst mode.

FSWIDTH[1:0] Name Description

0x0 SLOT Frame Sync Pulse is 1 Slot wide (default for I2S protocol)

0x1 HALF Frame Sync Pulse is half a Frame wide

0x2 BIT Frame Sync Pulse is 1 Bit wide

0x3 BURST Clock Unit n operates in Burst mode, with a 1-bit wide Frame Sync pulse per

Data sample, only when Data transfer is requested

Bits 4:2 – NBSLOTS[2:0] Number of Slots in Frame

Each Frame for Clock Unit n is composed of (NBSLOTS + 1) Slots.

Bits 1:0 – SLOTSIZE[1:0] Slot Size

Each Slot for Clock Unit n is composed of a number of bits specified by SLOTSIZE.

SLOTSIZE[1:0] Name Description

0x0 8 8-bit Slot for Clock Unit n

0x1 16 16-bit Slot for Clock Unit n

0x2 24 24-bit Slot for Clock Unit n

0x3 32 32-bit Slot for Clock Unit n

SAM D21 Family

I2S - Inter-IC Sound Controller

Datasheet Complete

DS40001882D-page 648