Datasheet
Figure 29-3. I
2
S Functional Block Diagram
29.6.1.1 Initialization
The I
2
S features two Clock Units, and two Serializers configurable as Receiver or Transmitter. The two
Serializers can either share the same Clock Unit or use separate Clock Units.
Before enabling the I
2
S, the following registers must be configured:
• Clock Control registers (CLKCTRLn)
• Serializer Control registers (SERCTRLm)
In Master mode, one of the generic clocks for the I
2
S must also be configured to operate at the required
frequency, as described in 29.6.1 Principle of Operation.
• fs is the sampling frequency that defines the frame period
• CLKCTRLn.NBSLOTS defines the number of slots in each frame
• CLKCTRLn.SLOTSIZE defines the number of bits in each slot
• SCKn frequency must be f
SCKn
= fs × number_of_slots × number_of_bits_per_slot)
Once the configuration has been written, the I
2
S Clock Units and Serializers can be enabled by writing a
'1' to the CKENn and SERENm bits and to the ENABLE bit in the Control register (CTRLA). The Clock
Unit n can be enabled alone, in Controller Mode, to output clocks to the MCKn, SCKn, and FSn pins. The
Clock Units must be enabled if Serializers are enabled.
The Clock Units and the Serializers can be disabled independently by writing a '0' to CTRLA.CKENn or
CTRLA.SERENm, respectively. Once requested to stop, they will only stop when the pending transmit
frames will be completed, if any. When requested to stop, the ongoing reception of the current slot will be
completed and then the Serializer will be stopped.
Example 29-1. Example Requirements: fs=48kHz, MCKn=384×fs
If a 384×fs MCKn Master Clock is required (i.e. 18.432MHz), the I
2
S generic clock could
run at 18.432MHz with a Master Clock Output Division Factor of 1 (selected by writing
CLKCTRLn.MCKOUTDIV=0x0) in order to obtain the desired MCKn frequency.
When using 6 slots per frame (CLKCTRLn.NBSLOTS=0x5) and 32-bit slots
(CLKCTRLn.SLOTSIZE=0x3), the desired SCKn frequency is
SAM D21 Family
I2S - Inter-IC Sound Controller
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Datasheet Complete
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