Datasheet
28.10.9 Address
Name: ADDR
Offset: 0x24
Reset: 0x0000
Property: Write-Synchronized
Bit 31 30 29 28 27 26 25 24
Access
Reset
Bit 23 22 21 20 19 18 17 16
LEN[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8
TENBITEN HS LENEN ADDR[10:8]
Access
R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
ADDR[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bits 23:16 – LEN[7:0] Transaction Length
These bits define the transaction length of a DMA transaction from 0 to 255 bytes. The Transfer Length
Enable (LENEN) bit must be written to '1' in order to use DMA.
Bit 15 – TENBITEN Ten Bit Addressing Enable
This bit enables 10-bit addressing. This bit can be written simultaneously with ADDR to indicate a 10-bit
or 7-bit address transmission.
Value Description
0
10-bit addressing disabled.
1
10-bit addressing enabled.
Bit 14 – HS High Speed
This bit enables High-speed mode for the current transfer from repeated START to STOP. This bit can be
written simultaneously with ADDR for a high speed transfer.
Value Description
0
High-speed transfer disabled.
1
High-speed transfer enabled.
Bit 13 – LENEN Transfer Length Enable
SAM D21 Family
SERCOM I2C – Inter-Integrated Circuit
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 619