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Datasheet

ManualsBrandsMicrochip ManualsARM MicrocontrollersARM® Cortex® M0+ SAM Microcontroller 32bit 256KB TQFP
581582583584585586587588589590
Writing '1' to this bit will clear the Address Match Interrupt Enable bit, which disables the Address Match
interrupt.
Value Description
0
The Address Match interrupt is disabled.
1
The Address Match interrupt is enabled.
Bit 0 – PREC Stop Received Interrupt Enable
Writing '0' to this bit has no effect.
Writing '1' to this bit will clear the Stop Received Interrupt Enable bit, which disables the Stop Received
interrupt.
Value Description
0
The Stop Received interrupt is disabled.
1
The Stop Received interrupt is enabled.
SAM D21 Family
SERCOM I2C – Inter-Integrated Circuit
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 584