Datasheet

If there is no I
2
C slave device responding to the address packet, then the INTFLAG.MB interrupt flag and
STATUS.RXNACK will be set. The clock hold is active at this point, preventing further activity on the bus.
The missing ACK response can indicate that the I
2
C slave is busy with other tasks or sleeping. Therefore,
it is not able to respond. In this event, the next step can be either issuing a stop condition (recommended)
or resending the address packet by a repeated start condition. When using SMBus logic, the slave must
ACK the address. If there is no response, it means that the slave is not available on the bus.
Case 3: Address packet transmit complete – Write packet, Master on Bus set
If the I
2
C master receives an acknowledge response from the I
2
C slave, INTFLAG.MB will be set and
STATUS.RXNACK will be cleared. The clock hold is active at this point, preventing further activity on the
bus.
In this case, the software implementation becomes highly protocol dependent. Three possible actions can
enable the I
2
C operation to continue:
• Initiate a data transmit operation by writing the data byte to be transmitted into DATA.DATA.
• Transmit a new address packet by writing ADDR.ADDR. A repeated start condition will
automatically be inserted before the address packet.
• Issue a stop condition, consequently terminating the transaction.
Case 4: Address packet transmit complete – Read packet, Slave on Bus set
If the I
2
C master receives an ACK from the I
2
C slave, the I
2
C master proceeds to receive the next byte of
data from the I
2
C slave. When the first data byte is received, the Slave on Bus bit in the Interrupt Flag
register (INTFLAG.SB) will be set and STATUS.RXNACK will be cleared. The clock hold is active at this
point, preventing further activity on the bus.
In this case, the software implementation becomes highly protocol dependent. Three possible actions can
enable the I
2
C operation to continue:
• Let the I
2
C master continue to read data by acknowledging the data received. ACK can be sent by
software, or automatically in smart mode.
• Transmit a new address packet.
• Terminate the transaction by issuing a stop condition.
Note: An ACK or NACK will be automatically transmitted if smart mode is enabled. The Acknowledge
Action bit in the Control B register (CTRLB.ACKACT) determines whether ACK or NACK should be sent.
28.6.2.4.3 Transmitting Data Packets
When an address packet with direction Master Write (see Figure 28-3) was transmitted successfully ,
INTFLAG.MB will be set. The I
2
C master will start transmitting data via the I
2
C bus by writing to
DATA.DATA, and monitor continuously for packet collisions. I
If a collision is detected, the I
2
C master will lose arbitration and STATUS.ARBLOST will be set. If the
transmit was successful, the I
2
C master will receive an ACK bit from the I
2
C slave, and
STATUS.RXNACK will be cleared. INTFLAG.MB will be set in both cases, regardless of arbitration
outcome.
It is recommended to read STATUS.ARBLOST and handle the arbitration lost condition in the beginning
of the I
2
C Master on Bus interrupt. This can be done as there is no difference between handling address
and data packet arbitration.
STATUS.RXNACK must be checked for each data packet transmitted before the next data packet
transmission can commence. The I
2
C master is not allowed to continue transmitting data packets if a
NACK is received from the I
2
C slave.
SAM D21 Family
SERCOM I2C – Inter-Integrated Circuit
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 559