Datasheet

Enable bit in the CTRLA register (CTRLA.ENABLE)
Receiver Enable bit in the CTRLB register (CTRLB.RXEN)
Note:  CTRLB.RXEN is write-synchronized somewhat differently. See also CTRLB register for details.
Required write-synchronization is denoted by the "Write-Synchronized" property in the register
description.
Related Links
14.3 Register Synchronization
SAM D21 Family
SERCOM SPI – SERCOM Serial Peripheral Interface
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Datasheet Complete
DS40001882D-page 524