Datasheet

26.8.4 Receive Pulse Length Register
Name: RXPL
Offset: 0x0E
Reset: 0x00
Property: Enable-Protected, PAC Write-Protection
Bit 7 6 5 4 3 2 1 0
RXPL[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bits 7:0 – RXPL[7:0] Receive Pulse Length
When the encoding format is set to IrDA (CTRLB.ENC=1), these bits control the minimum pulse length
that is required for a pulse to be accepted by the IrDA receiver with regards to the serial engine clock
period 

.
  RXPL + 2  

SAM D21 Family
SERCOM USART
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 495