Datasheet

26.7 Register Summary
Offset Name Bit Pos.
0x00 CTRLA
7:0 RUNSTDBY MODE[2:0] ENABLE SWRST
15:8 SAMPR[2:0] IBON
23:16 SAMPA[1:0] RXPO[1:0] TXPO[1:0]
31:24 DORD CPOL CMODE FORM[3:0]
0x04 CTRLB
7:0 SBMODE CHSIZE[2:0]
15:8 PMODE ENC SFDE COLDEN
23:16 FIFOCLR[1:0] RXEN TXEN
31:24
0x08
...
0x0B
Reserved
0x0C BAUD
7:0 BAUD[7:0]
15:8 BAUD[15:8]
0x0E RXPL 7:0 RXPL[7:0]
0x0F
...
0x13
Reserved
0x14 INTENCLR 7:0 ERROR RXBRK CTSIC RXS RXC TXC DRE
0x15 Reserved
0x16 INTENSET 7:0 ERROR RXBRK CTSIC RXS RXC TXC DRE
0x17 Reserved
0x18 INTFLAG 7:0 ERROR RXBRK CTSIC RXS RXC TXC DRE
0x19 Reserved
0x1A STATUS
7:0 TXE COLL ISF CTS BUFOVF FERR PERR
15:8
0x1C SYNCBUSY
7:0 CTRLB ENABLE SWRST
15:8
23:16
31:24
0x20
...
0x27
Reserved
0x28 DATA
7:0 DATA[7:0]
15:8 DATA[8:8]
0x2A
...
0x2F
Reserved
0x30 DBGCTRL 7:0 DBGSTOP
0x31
...
0x33
Reserved
0x34 FIFOSPACE
7:0 TXSPACE[4:0]
15:8 RXSPACE[4:0]
SAM D21 Family
SERCOM USART
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 485