Datasheet

26.3 Block Diagram
Figure 26-1. USART Block Diagram
GCLK
(internal)
XCK
BAUD
Baud Rate Generator
TX DATA
TX Shift Register
RX Shift Register
STATUS
Status
RX DATA
RX Buffer
TxD
RxD
CTRLA.MODE
/1 - /2 - /16
CTRLA.MODE
26.4 Signal Description
Table 26-1. SERCOM USART Signals
Signal Name Type Description
PAD[3:0] Digital I/O General SERCOM pins
One signal can be mapped to one of several pins.
Related Links
7. I/O Multiplexing and Considerations
26.5 Product Dependencies
In order to use this peripheral, other parts of the system must be configured correctly, as described below.
26.5.1 I/O Lines
Using the USART’s I/O lines requires the I/O pins to be configured using the I/O Pin Controller (PORT).
When the SERCOM is used in USART mode, the SERCOM controls the direction and value of the I/O
pins according to the table below. Both PORT control bits PINCFGn.PULLEN and PINCFGn.DRVSTR are
still effective. If the receiver or transmitter is disabled, these pins can be used for other purposes.
Table 26-2. USART Pin Configuration
Pin Pin Configuration
TxD Output
RxD Input
XCK Output or input
SAM D21 Family
SERCOM USART
© 2018 Microchip Technology Inc.
Datasheet Complete
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