Datasheet

26. SERCOM USART
26.1 Overview
The Universal Synchronous and Asynchronous Receiver and Transmitter (USART) is one of the available
modes in the Serial Communication Interface (SERCOM).
The USART uses the SERCOM transmitter and receiver, see 26.3 Block Diagram. Labels in uppercase
letters are synchronous to CLK_SERCOMx_APB and accessible for CPU. Labels in lowercase letters can
be programmed to run on the internal generic clock or an external clock.
The transmitter consists of a single write buffer, a shift register, and control logic for different frame
formats. The write buffer support data transmission without any delay between frames. The receiver
consists of a two-level receive buffer and a shift register. Status information of the received data is
available for error checking. Data and clock recovery units ensure robust synchronization and noise
filtering during asynchronous data reception.
Related Links
25. SERCOM – Serial Communication Interface
26.2 USART Features
• Full-duplex Operation
• Asynchronous (with Clock Reconstruction) or Synchronous Operation
• Internal or External Clock source for Asynchronous and Synchronous Operation
• Baud-rate Generator
• Supports Serial Frames with 5, 6, 7, 8 or 9 Data bits and 1 or 2 Stop bits
• Odd or Even Parity Generation and Parity Check
• Selectable LSB- or MSB-first Data Transfer
• Buffer Overflow and Frame Error Detection
• Noise Filtering, Including False Start bit Detection and Digital Low-pass Filter
• Collision Detection
• Can Operate in all Sleep modes
• Operation at Speeds up to Half the System Clock for Internally Generated Clocks
• Operation at Speeds up to the System Clock for Externally Generated Clocks
• RTS and CTS Flow Control
• IrDA Modulation and Demodulation up to 115.2kbps
• Start-of-frame detection
• Can work with DMA
Related Links
25.2 Features
SAM D21 Family
SERCOM USART
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 468