Datasheet

Bit 0 – PMUXEN Peripheral Multiplexer Enable
This bit enables or disables the peripheral multiplexer selection set in the Peripheral Multiplexing register
(PMUXn) to enable or disable alternative peripheral control over an I/O pin direction and output drive
value.
Writing a zero to this bit allows the PORT to control the pad direction via the Data Direction register (DIR)
and output drive value via the Data Output Value register (OUT). The peripheral multiplexer value in
PMUXn is ignored. Writing '1' to this bit enables the peripheral selection in PMUXn to control the pad. In
this configuration, the Physical Pin state may still be read from the Data Input Value register (IN) if
PINCFGn.INEN is set.
Value Description
0
The peripheral multiplexer selection is disabled, and the PORT registers control the direction
and output drive value.
1
The peripheral multiplexer selection is enabled, and the selected peripheral function controls
the direction and output drive value.
SAM D21 Family
PORT - I/O Pin Controller
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 436