Datasheet

23. PORT - I/O Pin Controller

23.1 Overview

The IO Pin Controller (PORT) controls the I/O pins of the device. The I/O pins are organized in a series of

groups, collectively referred to as a PORT group. Each PORT group can have up to 32 pins that can be

configured and controlled individually or as a group. The number of PORT groups on a device may

depend on the package/number of pins. Each pin may either be used for general-purpose I/O under

direct application control or be assigned to an embedded device peripheral. When used for general-

purpose I/O, each pin can be configured as input or output, with highly configurable driver and pull

settings.

All I/O pins have true read-modify-write functionality when used for general-purpose I/O; the direction or

the output value of one or more pins may be changed (set, reset or toggled) explicitly without

unintentionally changing the state of any other pins in the same port group by a single, atomic 8-, 16- or

32-bit write.

The PORT is connected to the high-speed bus matrix through an AHB/APB bridge. The Pin Direction,

Data Output Value and Data Input Value registers may also be accessed using the low-latency CPU local

bus (IOBUS; ARM

single-cycle I/O port) .

23.2 Features

• Selectable input and output configuration for each individual pin

• Software-controlled multiplexing of peripheral functions on I/O pins

• Flexible pin configuration through a dedicated Pin Configuration register

• Configurable output driver and pull settings:

– Totem-pole (push-pull)

– Pull configuration

– Driver strength

• Configurable input buffer and pull settings:

– Internal pull-up or pull-down

– Input sampling criteria

– Input buffer can be disabled if not needed for lower power consumption

– Read-Modify-Write support for output value (OUTCLR/OUTSET/OUTGL) and pin direction

(DIRCLR/DIRSET/DIRTGL)

SAM D21 Family

PORT - I/O Pin Controller

Datasheet Complete

DS40001882D-page 406