Datasheet

Bits 9:8 – SLEEPPRM[1:0] Power Reduction Mode during Sleep

Indicates the Power Reduction Mode during sleep.

Value Name Description

0x0

WAKEUPACCESS NVM block enters low-power mode when entering sleep.

NVM block exits low-power mode upon first access.

0x1

WAKEUPINSTANT NVM block enters low-power mode when entering sleep.

NVM block exits low-power mode when exiting sleep.

0x2

Reserved

0x3

DISABLED Auto power reduction disabled.

Bit 7 – MANW Manual Write

Note that reset value of this bit is '1'.

Value Description

Writing to the last word in the page buffer will initiate a write operation to the page addressed

by the last write operation. This includes writes to memory and auxiliary rows.

Write commands must be issued through the CTRLA.CMD register.

Bits 4:1 – RWS[3:0] NVM Read Wait States

These bits control the number of wait states for a read operation. '0' indicates zero wait states, '1'

indicates one wait state, etc., up to 15 wait states.

This register is initialized to 0 wait states. Software can change this value based on the NVM access time

and system frequency.

SAM D21 Family

NVMCTRL – Nonvolatile Memory Controller

Datasheet Complete

DS40001882D-page 397