Datasheet
Figure 22-3. NVM Memory Organization
Calibration and
Auxillary Space
RWWEE
Address Space
NVM Main
Address Space
NVM Base Address + 0x00800000
NVM Base Address + 0x00400000
NVM Base Address + NVM Size
NVM Base Address
The lower rows in the NVM main address space can be allocated as a boot loader section by using the
BOOTPROT fuses, and the upper rows can be allocated to EEPROM, as shown in the figure below.
The boot loader section is protected by the lock bit(s) corresponding to this address space and by the
BOOTPROT[2:0] fuse. The EEPROM rows can be written regardless of the region lock status.
The number of rows protected by BOOTPROT is given in Boot Loader Size, the number of rows allocated
to the EEPROM are given in EEPROM Size.
SAM D21 Family
NVMCTRL – Nonvolatile Memory Controller
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001882D-page 386