Datasheet

22. NVMCTRL – Nonvolatile Memory Controller

22.1 Overview

Nonvolatile Memory (NVM) is a reprogrammable Flash memory that retains program and data storage

even with power off. It embeds a main array and a separate smaller array intended for EEPROM

emulation (RWWEE) that can be programmed while reading the main array. The NVM Controller

(NVMCTRL) connects to the AHB and APB bus interfaces for system access to the NVM block. The AHB

interface is used for reads and writes to the NVM block, while the APB interface is used for commands

and configuration.

22.2 Features

• 32-bit AHB interface for reads and writes

• Read-While-Write DATA Flash

• All NVM sections are memory mapped to the AHB, including calibration and system configuration

• 32-bit APB interface for commands and control

• Programmable wait states for read optimization

• 16 regions can be individually protected or unprotected

• Additional protection for bootloader

• Supports device protection through a security bit

• Interface to Power Manager for power-down of Flash blocks in sleep modes

• Can optionally wake up on exit from sleep or on first access

• Direct-mapped cache

Note: A register with property "Enable-Protected" may contain bits that are not enable-protected.

22.3 Block Diagram

Figure 22-1. Block Diagram

Command and

Control

NVM Interface

Cache

NVM Block

NVMCTRL

AHB

APB

main array

RWWEE array

SAM D21 Family

NVMCTRL – Nonvolatile Memory Controller

Datasheet Complete

DS40001882D-page 383